hex - How to initialize parameter array in verilog? -

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How to start the parameter type array in a verilog, where each member has 32 bit hexadecimal notation numbers? I have tried the following but it gives me a syntax error. 

  parameter [31: 0] k [0:63] = {32'habc132, 32'hba324f, ...};   
 I am using the latest version of iverilog for compiling.   
 
 
 Using the following example Modelim 10.1, the file has an .sv extension, which causes it SystemWrite can be defined as:  
  module testing; Parameters [31: 0] of [0: 1] = {32'habc132, 32'hba324f}; Startup $ starth (k [0]); $ Displayh (k [1]); End end module   
 If the setting on SystemVerilog does not work or is not available for your simulator, then I suggest that the query contains a syntax error.

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